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50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers AD8651/AD8652
FEATURES
Bandwidth: 50 MHz @ 5 V Low Noise: 4.5 nV/Hz Offset voltage: 100 V typ, specified over entire common-mode range 41 V/s slew rate Rail-to-rail input and output swing Input bias current: 1 pA Single-supply operation: 2.7 V to 5.5 V Space-saving MSOP and SOIC packaging
NC 1 -IN 2 +IN 3 V- 4
PIN CONFIGURATIONS
8
NC V+ OUT NC
03301-0-001
OUT A 1 -IN A 2 +IN A 3 V- 4
8
V+ OUT B -IN B +IN B
03301-B-003
03301-B-004
AD8651
TOP VIEW (Not to Scale)
7 6 5
AD8652
TOP VIEW (Not to Scale)
7 6 5
NC = NO CONNECT
Figure 1. 8-Lead MSOP (RM-8)
Figure 2. 8-Lead MSOP (RM-8)
NC 1
8
NC V+
03301-0-002
OUT A 1 -IN A 2 +IN A 3
8
V+ OUT B
APPLICATIONS
Optical communications Laser source drivers/controllers Broadband communications High speed ADC and DAC Microwave link interface Cell phone PA control Video line driver Audio
-IN 2 +IN 3
AD8651
7
AD8652
7
6 OUT TOP VIEW V- 4 (Not to Scale) 5 NC
6 -IN B TOP VIEW V- 4 (Not to Scale) 5 +IN B
NC = NO CONNECT
Figure 3. 8-Lead SOIC (R-8)
Figure 4. 8-Lead SOIC (R-8)
GENERAL DESCRIPTION
The AD8651 is a high precision, low noise, low distortion, railto-rail CMOS operational amplifier that runs from a singlesupply voltage of 2.7 V to 5 V. The AD8651 is a rail-to-rail input and output amplifier with a gain bandwidth of 50 MHz and a typical voltage offset of 100 V across common mode from a 5 V supply. It also features low noise--4.5 nV/Hz. The AD8651 can be used in communications applications, such as cell phone transmission power control, fiber optic networking, wireless networking, and video line drivers.
The AD8651 features the newest generation of DigiTrim(R) in-package trimming. This new generation measures and corrects the offset over the entire input common-mode range, providing less distortion from VOS variation than is typical of other rail-to-rail amplifiers. Offset voltage and CMRR are both specified and guaranteed over the entire common-mode range as well as over the extended industrial temperature range. The AD8651 is offered in the 8-lead SOIC package and the 8-lead MSOP package. It is specified over the extended industrial temperature range (-40C to +125C).
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
AD8651/AD8652 TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3 Electrical Characteristics ................................................................. 4 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Typical Performance Characteristics ............................................. 6 Applications..................................................................................... 14 Theory of Operation .................................................................. 14 Rail-to-Rail Output Stage...................................................... 14 Rail-to-Rail Input Stage ......................................................... 14 Input Protection ..................................................................... 15 Overdrive Recovery ............................................................... 15 Layout, Grounding, and Bypassing considerations ............... 15 Power Supply Bypassing........................................................ 15 Grounding............................................................................... 15 Leakage Currents.................................................................... 15 Input Capacitance .................................................................. 15 Output Capacitance ............................................................... 16 Settling Time........................................................................... 16 THD Readings vs. Common-Mode Voltage ...................... 16 Driving a 16-Bit ADC............................................................ 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18
REVISION HISTORY
9/04--Data Sheet Changed from Rev. A to Rev. B Added AD8652 ....................................................................Universal Change to General Description ....................................................... 1 Changes to Electrical Characteristics ............................................. 3 Changes to Absolute Maximum Ratings ........................................ 5 Change to Figure 23 .......................................................................... 9 Change to Figure 26 .......................................................................... 9 Change to Figure 36 ........................................................................ 11 Change to Figure 42 ........................................................................ 12 Change to Figure 49 ........................................................................ 13 Change to Figure 51 ........................................................................ 13 Inserted Figure 52............................................................................ 13 Change to Theory of Operation section....................................... 14 Change to Input Protection section .............................................. 15 Changes to Ordering Guide ........................................................... 20 6/04--Changed from REV. 0 to REV. A Change to Figure 18 .............................................................................8 Change to Figure 21 .............................................................................9 Change to Figure 29 .............................................................................10 Change to Figure 30 .............................................................................10 Change to Figure 43 .............................................................................12 Change to Figure 44 .............................................................................12 Change to Figure 47 .............................................................................13 Change to Figure 57 .............................................................................17
10/03 Revision 0: Initial Version
Rev. B | Page 2 of 20
AD8651/AD8652 ELECTRICAL CHARACTERISTICS
Table 1. V+ = 2.7 V, V- = 0 V, VCM = V+/2, TA = 25C, unless otherwise specified
Parameter INPUT CHARACTERISTICS Offset Voltage AD8651 Symbol VOS 0 VCM 2.7 V -40C TA +85C, 0 VCM 2.7 V -40C TA +125C, 0 VCM 2.7 V 0 VCM 2.7 V -40C TA +125C, 0 VCM 2.7 V IB -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio AD8651 VCM CMRR V+ = 2.7 V, -0.1 V < VCM < +2.8 V -40C TA +85C, -0.1 V < VCM < +2.8 V -40C TA +125C, -0.1 V < VCM < +2.8 V V+ = 2.7 V, -0.1 V < VCM < +2.8 V -40C TA +125C, -0.1 V < VCM < +2.8 V RL = 1 k, 200 mV < VO < 2.5 V RL = 1 k, 200 mV < VO < 2.5 V, TA = +85C RL = 1 k, 200 mV < VO < 2.5 V, TA = +125C IL = 250 A, -40C TA +125C IL = 250 A, -40C TA +125C Sourcing Sinking -0.1 75 70 65 77 73 100 100 95 2.67 30 80 80 +40 76 74 94 93 9 17.5 12 14.5 19.5 22.5 95 88 85 95 90 115 114 108 1 100 350 1.4 1.6 300 1.3 10 600 10 30 600 +2.8 V mV mV V mV V/C pA pA pA pA pA V dB dB dB dB dB dB dB dB V mV mA mA mA dB dB mA mA mA mA pF pF V/s MHz s s % nV/Hz nV/Hz fA/Hz Conditions Min Typ Max Unit
AD8652 Offset Voltage Drift Input Bias Current
90 0.4 4 1
AD8652 Large Signal Voltage Gain AVO
OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short Circuit Limit Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current AD8651 AD8652 INPUT CAPACITANCE Differential Common-Mode DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time, 0.01% Overload Recovery Time Total Harmonic Distortion + Noise NOISE PERFORMANCE Voltage Noise Density Current Noise Density
VOH VOL ISC IO PSRR ISY
VS = 2.7 V to 5.5 V, VCM = 0 V -40C TA +125C IO = 0 -40C TA +125C IO = 0 -40C TA +125C
CIN 6 9 SR GBP G = 1, RL = 10 k G=1 G = 1, 2 V Step VIN x G = 1.48 V+ G = 1, RL = 600 , f = 1 kHz, VIN = 2 V p-p f = 10 kHz f = 100 kHz in f = 10 kHz 41 50 0.2 0.1 0.0006 5 4.5 4
THD + N en
Rev. B | Page 3 of 20
AD8651/AD8652 ELECTRICAL CHARACTERISTICS
Table 2. V+ = 5 V, V- = 0 V, VCM = V+/2, TA = 25C, unless otherwise specified
Parameter INPUT CHARACTERISTICS Offset Voltage AD8651 Symbol VOS 0 VCM 5 V -40C TA +85C, 0 VCM 5 V -40C TA +125C, 0 VCM 5 V 0 VCM 5 V -40C TA +125C, 0 VCM 5 V IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio AD8651 VCM CMRR 0.1 V < VCM < 5.1 V -40C TA +85C, 0.1 V < VCM < 5.1 V -40C TA +125C, 0.1 V < VCM < 5.1 V 0.1 V < VCM < 5.1 V -40C TA +125C, 0.1 V < VCM < 5.1 V RL = 1 k, 200 mV < VO < 4.8 V RL = 1 k, 200 mV < VO < 4.8 V, TA = +85C RL = 1 k, 200 mV < VO < 4.8 V, TA = +125C IL = 250 A, -40C TA +125C IL = 250 A, -40C TA +125C Sourcing Sinking -0.1 80 75 70 84 76 100 98 95 4.97 30 80 80 +40 76 74 94 93 9.5 17.5 14.0 15 20.0 23.5 95 94 90 100 95 115 114 111 1 100 350 1.4 1.7 300 1.4 10 30 600 10 30 600 +5.1 V mV mV V mV V/C pA pA pA pA pA pA V dB dB dB dB dB dB dB dB V mV mA mA mA dB dB mA mA mA mA pF pF V/s MHz s s % nV/Hz nV/Hz fA/Hz Conditions Min Typ Max Unit
AD8652 Offset Voltage Drift Input Bias Current
90 0.4 4 1
AD8652 Large Signal Voltage Gain AVO
OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short Circuit Limit Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current AD8651 AD8652 INPUT CAPACITANCE Differential Common-Mode DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time, 0.01% Overload Recovery Time Total Harmonic Distortion + Noise NOISE PERFORMANCE Voltage Noise Density Current Noise Density
VOH VOL ISC IO PSRR ISY
VS = 2.7 V to 5.5 V, VCM = 0 V -40C TA +125C IO = 0 -40C TA +125C IO = 0 -40C TA +125C
CIN 6 9 SR GBP G = 1, RL = 10 k G=1 G = 1, 2 V Step VIN x G = 1.2 V+ G = 1, RL = 600 , f = 1 kHz, VIN = 2 V p-p f = 10 kHz f = 100 kHz In f = 10 kHz 41 50 0.2 0.1 0.0006 5 4.5 4
THD + N en
Rev. B | Page 4 of 20
AD8651/AD8652 ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25C, unless otherwise noted. Table 3.
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Electrostatic Discharge (HBM) Storage Temperature Range RM, R Package Operating Temperature Range Junction Temperature Range RM, R Package Lead Temperature (Soldering, 10 s) Rating 6.0 V GND to VS + 0.3 V 6.0 V Indefinite 4000 V -65C to +150C -40C to +125C -65C to +150C 300C
Table 4.
Package Type 8-Lead MSOP (RM) 8-Lead SOIC (R) JA1 210 158 JC 45 43 Unit C/W C/W
1
JA is specified for the worst-case conditions, i.e., JA is specified for device soldered in circuit board for surface-mount packages.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 5 of 20
AD8651/AD8652 TYPICAL PERFORMANCE CHARACTERISTICS
60 VS = 2.5V VCM = 0V 50
80 100 VS = 5V
NUMBER OF AMPLIFIERS
40
60
VOS (V)
30
40
20
20
10
0
03301-B-008 03301-B-010
03301-B-005
0
-20 0 1 2 3 4 COMMON-MODE VOLTAGE (V) 5 6
120
160
-200
-160
-120
VOS (V)
Figure 5. Input Offset Voltage Distribution
300 VS = 2.5V VCM = 0V 200
200
0
40
-80
-40
80
Figure 8. Input Offset Voltage vs. Common-Mode Voltage
500 VS = 2.5V 400
100
INPUT BAIS CURRENT (pA)
300
VOS (V)
0
200
-100
-200
03301-B-006
100
-300 -50
0 0 20 40 60 80 100 TEMPERATURE (C) 120 140
0
50 TEMPERATURE (C)
100
150
Figure 6. Input Offset Voltage vs. Temperature
Figure 9. Input Bias Current vs. Temperature
60 VS = 2.5V VCM = 0V T: -40C TO 125C
10
50
NUMBER OF AMPLIFIERS
8
40
SUPPLY CURRENT (mA)
6
30
4
20
10
03301-B-007
2
0 0 1 2 3 4 5 6 7 TCVOS (V/C) 8 9 10 11
0 0 1 2 3 4 SUPPLY VOLTAGE (V) 5 6
Figure 7. TCVOS Distribution
Figure 10. Supply Current vs. Supply Voltage
Rev. B | Page 6 of 20
03301-B-009
AD8651/AD8652
12 VS = 2.5V 11
2.00 2.50 VS = 5V IL = 250A
10
OUTPUT SWING LOW (mV)
SUPPLY CURRENT (mA)
1.50
9
1.00
8
7
03301-B-011
0.50
6 -50
0
50 TEMPERATURE (C)
100
150
0 -50
0
50 TEMPERATURE (C)
100
150
Figure 11. Supply Current vs. Temperature
Figure 14. Output Voltage Swing Low vs. Temperature
500 VS = 2.5V 400
100 VS = 2.5V 80
VSY - VOUT (mV)
VOH 200 VOL 100
CMRR (dB)
300
60
40
20
03301-B-012
0 0 20 40 60 CURRENT LOAD (mA) 80 100
0 10
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 12. Output Voltage to Supply Rail vs. Load Current
Figure 15. CMRR vs. Frequency
4.997 VS = 5V IL = 250A
110 VS = 2.5V
4.996
105
OUTPUT SWING HIGH (V)
4.995
4.994 4.993
CMRR (dB)
100
4.992 4.991
03301-B-013
95
4.990 -50
0
50 TEMPERATURE (C)
100
150
90 -50
0
50 TEMPERATURE (C)
100
150
Figure 13. Output Voltage Swing High vs. Temperature
Figure 16. CMRR vs. Temperature
Rev. B | Page 7 of 20
03301-B-016
03301-B-015
03301-B-014
AD8651/AD8652
100
100 VS = 2.5V
94
91
VOLTAGE NOISE DENSITY (nV/Hz)
03301-B-017
97
CMRR (dB)
10
88
85
82 -50
0
50 TEMPERATURE (C)
100
150
1 10
100
1k FREQUENCY (Hz)
10k
100k
Figure 17. CMRR vs. Temperature
Figure 20. Voltage Noise Density vs. Frequency
100 VS = 2.5V 80 +PSRR 60 -PSRR 40
80 VS = 2.5V
CURRENT NOISE DENSITY (fA/Hz)
60
PSRR (dB)
40
20
20
0 1 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 100M
0 100
1k FREQUENCY (Hz)
10k
100k
Figure 18. PSRR vs. Frequency
Figure 21. Current Noise Density vs. Frequency
100 VS = 2.5V
VS = 2.5V VIN = 6.4V VIN
95
VOLTAGE (1V/DIV)
VOUT 0
PSRR (dB)
90
85
80 -50
0
50 TEMPERATURE (C)
100
150
03301-B-019
TIME (200s/DIV)
Figure 19. PSRR vs. Temperature
Figure 22. No Phase Reversal
Rev. B | Page 8 of 20
03301-B-022
03301-B-021
03301-B-018
03301-B-020
AD8651/AD8652
140 VS = 2.5V 120
40
0
60 VS = 2.5V RL = 1M CL = 47pF
80 60 40 20 0 -135 -90
CLOSED-LOOP GAIN (dB)
100
-45
G = 100
OPEN-LOOP GAIN (dB)
PHASE (Degrees)
20 G = 10
0 G=1
-20
03301-B-023
-20 10
-180 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M
-40 5k
50k
500k 5M FREQUENCY (Hz)
50M
300M
Figure 23. Open-Loop Gain and Phase vs. Frequency
Figure 26. Closed-Loop Gain vs. Frequency
117 VS = 2.5V RL = 1k
6
5
MAXIMUM OUTPUT SWING (V)
116
VS = 5V 4
115
AVO (dB)
3 VS = 2.7V 2
114
113
1
03301-B-027
03301-B-024
112 -50
0
50 TEMPERATURE (C)
100
150
0 100k
1M
10M FREQUENCY (Hz)
100M
Figure 24. Open-Loop Gain vs. Temperature
Figure 27. Maximum Output Swing vs. Frequency
140 VS = 2.5V 130 120 2.5mA IL = 250A
VS = 2.5V CL = 47pF AV = 1
OPEN-LOOP GAIN (dB)
110 100 90 80 70 60 0 50 100 150 200 OUTPUT VOLTAGE SWING FROM THE RAILS (mV) 250
03301-B-025
VOLTAGE (1V/DIV)
4.2mA
TIME (100s/DIV)
Figure 25. Open-Loop Gain vs. Output Voltage Swing
Figure 28. Large Signal Response
Rev. B | Page 9 of 20
03301-B-028
03301-B-026
AD8651/AD8652
VS = 2.5V VIN = 200mV AV = 1
VS = 2.5V VIN = 200mV GAIN = -15 0V OUTPUT
VOLTAGE (100mV/DIV)
-2.5V 200mV INPUT 0V
03301-B-029
TIME (10s/DIV)
TIME (200ns/DIV)
Figure 29. Small Signal Response
Figure 32. Positive Overload Recovery Time
30 VS = 2.5V VIN = 200mV AV = 1
OUTPUT IMPEDANCE ()
40 VS = 2.5V
SMALL SIGNAL OVERSHOOT (%)
25
30
20 -OS 15 +OS 10
20 GAIN = 10 GAIN = 1 GAIN = 100
10
5
03301-B-030
03301-B-032
0 0 10 20 30 40 CAPACITANCE (pF) 50 60 70
0 10
100
1000 FREQUENCY (Hz)
10000
100000
Figure 30. Small Signal Overshoot vs. Load Capacitance
Figure 33. Output Impedance vs. Frequency
2.5V
VS = 2.5V VIN = 200mV GAIN = -15
60 VS = 1.35V VCM = 0V 50
NUMBER OF AMPLIFIERS
0V
40
30
0V -200mV
20
10
03301-B-031
TIME (200ns/DIV)
VOS (V)
Figure 31. Negative Overload Recovery Time
Figure 34. Input Offset Voltage Distribution
Rev. B | Page 10 of 20
03301-B-034
0
120 160 -200 -160 -120 200 0 40 -80 -40 80
03301-B-033
AD8651/AD8652
300 VS = 1.35V VCM = 0V 200
400 500 VS = 1.35V
100
VSY - VOUT (mV)
300 VOH 200 VOL 100
VOS (V)
0
-100
-200
03301-B-035
-300 -50
0 0 20 40 60 CURRENT LOAD (mA) 80 100
0
50 TEMPERATURE (C)
100
150
Figure 35. Input Offset Voltage vs. Temperature
Figure 38. Output Voltage to Supply Rail vs. Load Current
80
VS = 2.7V
2.697 VS = 2.7V IL = 250A
2.696
INPUT OFFSET VOLTAGE (V)
60
OUTPUT SWING HIGH (V)
2.695
40
2.694 2.693
20
2.692 2.691
0
03301-B-036
-20 0 1 2 INPUT COMMON-MODE VOLTAGE (V) 3
2.690 -50
0
50 TEMPERATURE (C)
100
150
Figure 36. Input Offset Voltage vs. Common-Mode Voltage
Figure 39. Output Voltage Swing High vs. Temperature
11 VS = 1.35V
3.00 VS = 2.7V IL = 250A 2.50
10
OUTPUT SWING LOW (mV)
SUPPLY CURRENT (mA)
2.00
9
1.50
8
1.00
7
0.50
03301-B-037
6 -50
0
50 TEMPERATURE (C)
100
150
0 -50
0
50 TEMPERATURE (C)
100
150
Figure 37. Supply Current vs. Temperature
Figure 40. Output Voltage Swing Low vs. Temperature
Rev. B | Page 11 of 20
03301-B-040
03301-B-039
03301-B-038
AD8651/AD8652
VS = 1.35V AV = 1
SMALL SIGNAL OVERSHOOT (%)
30 VS = 1.35V VIN = 200mV 25
VOLTAGE (1V/DIV)
20
15
-OS
10 +OS
5
03301-B-041
0 0 10 20 30 40 CAPACITANCE (pF) 50 60 70
TIME (200s/DIV)
Figure 41. No Phase Reversal
Figure 44. Small Signal Overshoot vs. Load Capacitance
VS = 1.35V CL = 47pF AV = 1 1.35V
VOLTAGE (500mV/DIV)
VS = 1.35V VIN = 200mV GAIN = -10
0V
0V -200mV
03301-B-042
TIME (100s/DIV)
TIME (200ns/DIV)
Figure 42. Large Signal Response
Figure 45. Negative Overload Recovery Time
VS = 1.35V VIN = 200mV CL = 47pF AV = 1
VOLTAGE (100mV/DIV)
VS = 1.35V VIN = 200mV GAIN = -10 0V
-1.35V
200mV 0V
03301-B-043
TIME (10s/DIV)
TIME (200ns/DIV)
Figure 43. Small Signal Response
Figure 46. Positive Overload Recovery Time
Rev. B | Page 12 of 20
03301-B-046
03301-B-045
03301-B-044
AD8651/AD8652
100 VS = 1.35V 118 120 VS = 1.35V RL = 1k
80
116
CMRR (dB)
60
AVO (dB)
03301-B-047
114
40
112 20
110
03301-B-051 03301-B-062 03301-B-052
0 10
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
108 -50
0
50 TEMPERATURE (C)
100
150
Figure 47. CMRR vs. Frequency
Figure 50. Open-Loop Gain vs. Temperature
100 VS = 1.35V
60 VS = 1.35V RL = 1M CL = 47pF G = 100
80
40
CLOSED-LOOP GAIN (dB)
+PSRR 60 -PSRR
PSRR (dB)
20
G = 10
40
0
G=1
20
-20
0 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 10M
03301-B-048
-40 5k
50k
500k 5M FREQUENCY (Hz)
50M
300M
Figure 48. PSRR vs. Frequency
Figure 51. Closed-Loop Gain vs. Frequency
140 VS = 1.35V 120 100
0
0 -20 +2.5V VIN -40 -60 -80 -100 -120 28mV p-p V- -2.5V V+ VOUT
R1 10k V- V+ R2 100
-45
80 60 40 20 0 -20 10 -180 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M -135 -90
CHANNEL SEPARATION (dB)
OPEN-LOOP GAIN (dB)
PHASE (Degrees)
03301-B-050
-140 100
VS = 2.5V 1k 10k 100k FREQUENCY (Hz) 1M 10M
Figure 49. Open-Loop Gain and Phase vs. Frequency
Figure 52. Channel Separation
Rev. B | Page 13 of 20
AD8651/AD8652 APPLICATIONS
THEORY OF OPERATION
The AD8651 amplifier is a voltage feedback, rail-to-rail input and output precision CMOS amplifier that operates from 2.7 V to 5.0 V of power supply voltage. This amplifier uses Analog Devices' DigiTrim technology to achieve a higher degree of precision than is available from most CMOS amplifiers. DigiTrim technology, used in a number of ADI amplifiers, is a method of trimming the offset voltage of the amplifier after it has been assembled. The advantage of post-package trimming is that it corrects any offset voltages caused by the mechanical stresses of assembly. The AD8651 is available in standard op amp pinout, making DigiTrim completely transparent to the user. The input stage of the amplifier is a true rail-to-rail architecture, allowing the input common-mode voltage range of the op amp to extend to both positive and negative supply rails. The open-loop gain of the AD8651/AD8652 with a load of 1 k is typically 115 dB. The AD8651 can be used in any precision op amp application. The amplifier does not exhibit phase reversal for commonmode voltages within the power supply. With voltage noise of 4.5 nV/Hz and -105 dB distortion for 10 kHz, 2 V p-p signals, the AD8651/AD8652 is a great choice for high resolution data acquisition systems. Its low noise, sub-pA input bias current, precision offset, and high speed make it a superb preamp for fast photodiode applications. The speed and output drive capability of the AD8651 also make it useful in video applications. output voltage swing is proportional to the output current, and larger currents will limit how close the output voltage can get to the proximity of the output voltage to the supply rail. This is a characteristic of all rail-to-rail output amplifiers. With 40 mA of output current, the output voltage can reach within 5 mV of the positive and negative rails. At light loads of >100 k, the output swings within ~1 mV of the supplies.
Rail-to-Rail Input Stage
The input common-mode voltage range of the AD8651 extends to both positive and negative supply voltages. This maximizes the usable voltage range of the amplifier, an important feature for single-supply and low voltage applications. This rail-to-rail input range is achieved by using two input differential pairs, one NMOS and one PMOS, placed in parallel. The NMOS pair is active at the upper end of the common-mode voltage range, and the PMOS pair is active at the lower end of the commonmode range. The NMOS and PMOS input stages are separately trimmed using DigiTrim to minimize the offset voltage in both differential pairs. Both NMOS and PMOS input differential pairs are active in a 500 mV transition region when the input commonmode voltage is approximately 1.5 V below the positive supply voltage. A special design technique improves the input offset voltage in the transition region that traditionally exhibits a slight VOS variation. As a result, the common-mode rejection ratio is improved within this transition band. Compared to the Burr Brown OPA350 amplifier, shown in Figure 53 (A), the AD8651, shown in Figure 53 (B), exhibits much lower offset voltage shift across the entire input common-mode range, including the transition region.
Rail-to-Rail Output Stage
The voltage swing of the output stage is rail-to-rail and is achieved by using an NMOS and PMOS transistor pair connected in a common source configuration. The maximum
600
600
400
400
200
200
VOS (V)
03301-B-053
VOS (V)
0
0
-200
-200
-400
-400
03301-B-054
-600 0 1 2 3 4 COMMON-MODE VOLTAGE (V)
(A) OPA350 VOS vs. VCM
-600 0 1 2 3 4 COMMON-MODE VOLTAGE (V)
(B) AD8651 VOS vs. VCM
5
6
5
6
Figure 53. Input Offset Distribution over Common-Mode Voltage
Rev. B | Page 14 of 20
AD8651/AD8652
Input Protection
As with any semiconductor device, if a condition could exist for the input voltage to exceed the power supply, the device's input overvoltage characteristic must be considered. The inputs of the AD8651 are protected with ESD diodes to either power supply. Excess input voltage will energize internal PN junctions in the AD8651, allowing current to flow from the input to the supplies. This results in an input stage with picoamps of input current that can withstand up to 4000 V ESD events (human body model) with no degradation. Excessive power dissipation through the protection devices will destroy or degrade the performance of any amplifier. Differential voltages greater than 7 V will result in an input current of approximately (|VCC - VEE| - 0.7 V)/RI, where RI is the resistance in series with the inputs. For input voltages beyond the positive supply, the input current will be approximately (VI - VCC - 0.7)/RI. For input voltages beyond the negative supply, the input current will be about (VI - VEE + 0.7)/RI. If the inputs of the amplifier sustain differential voltages greater than 7 V or input voltages beyond the amplifier power supply, limit the input current to 10 mA by using an appropriately sized input resistor (RI), as shown in Figure 54.
RI > (| VCC - VEE | - 0.7V) 30mA RI > RI > (VI - VEE - 0.7V) 30mA (VI - VEE + 0.7V) 30mA
(X7R or NPO) are critical and should be as close as possible to the amplifier package. The 4.7 F tantalum capacitor is less critical for high frequency bypassing, and, in most cases, only one is needed per board at the supply inputs.
Grounding
A ground plane layer is important for densely packed PC boards to spread the current-minimizing parasitic inductances. However, an understanding of where the current flows in a circuit is critical to implementing effective high speed circuit design. The length of the current path is directly proportional to the magnitude of parasitic inductances and, therefore, the high frequency impedance of the path. High speed currents in an inductive ground return will create an unwanted voltage noise. The length of the high frequency bypass capacitor leads is critical. A parasitic inductance in the bypass grounding will work against the low impedance created by the bypass capacitor. Place the ground leads of the bypass capacitors at the same physical location. Because load currents also flow from the supplies, the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For the larger value capacitors, intended to be effective at lower frequencies, the current return path distance is less critical.
Leakage Currents
Poor PC board layout, contaminants, and the board insulator material can create leakage currents that are much larger than the input bias current of the AD8651/AD8652. Any voltage differential between the inputs and nearby traces will set up leakage currents through the PC board insulator, for example, 1 V/100 G = 10 pA. Similarly, any contaminants on the board can create significant leakage (skin oils are a common problem). To significantly reduce leakages, put a guard ring (shield) around the inputs and input leads that are driven to the same voltage potential as the inputs. This ensures that there is no voltage potential between the inputs and the surrounding area to set up any leakage currents. To be effective, the guard ring must be driven by a relatively low impedance source and should completely surround the input leads on all sides, above and below, using a multilayer board. Another effect that can cause leakage currents is the charge absorption of the insulator material itself. Minimizing the amount of material between the input leads and the guard ring will help to reduce the absorption. Also, low absorption materials, such as Teflon(R) or ceramic, may be necessary in some instances.
FOR LARGE | VCC - VEE |
+
AD8651
- VI + RI -
Figure 54. Input Protection Method
Overdrive Recovery
Overdrive recovery is defined as the time it takes for the output of an amplifier to come off the supply rail after an overload signal is initiated. This is usually tested by placing the amplifier in a closed-loop gain of 15 with an input square wave of 200 mV p-p while the amplifier is powered from either 5 V or 3 V. The AD8651 has excellent recovery time from overload conditions (see Figure 31 and Figure 32). The output recovers from the positive supply rail within 200 ns at all supply voltages. Recovery from the negative rail is within 100 ns at 5 V supply.
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
Power Supply Bypassing
Power supply pins can act as inputs for noise, so care must be taken that a noise-free, stable dc voltage is applied. The purpose of bypass capacitors is to create low impedances from the supply to ground at all frequencies, thereby shunting or filtering most of the noise. Bypassing schemes are designed to minimize the supply impedance at all frequencies with a parallel combination of capacitors of 0.1 F and 4.7 F. Chip capacitors of 0.1 F
03301-B-055
FOR VI BEYOND SUPPLY VOLTAGES + VO
Input Capacitance
Along with bypassing and ground, high speed amplifiers can be sensitive to parasitic capacitance between the inputs and ground. A few picofarads of capacitance will reduce the input impedance at high frequencies, which in turn increases the amplifier's gain, causing peaking in the frequency response or
Rev. B | Page 15 of 20
AD8651/AD8652
oscillations. With the AD8651, additional input damping is required for stability with capacitive loads greater than 47 pF with direct input to output feedback (see the next section).
V+ + V+ V- V- RS CS 200mV CL RL
03301-B-057
AD8651
-
VOUT
Output Capacitance
When using high speed amplifiers, it is important to consider the effects of the capacitive loading on the amplifier's stability. Capacitive loading interacts with the output impedance of the amplifier, causing reduction of the BW as well as peaking and ringing of the frequency response. To reduce the effects of the capacitive loading and allow higher capacitive loads, there are two commonly used methods: 1) As shown in Figure 55, place a small value resistor (RS) in series with the output to isolate the load capacitor from the amplifier's output. Heavy capacitive loads can reduce the phase margin of an amplifier and cause the amplifier response to peak or become unstable. The AD8651 is able to drive up to 47 pF in a unity gain buffer configuration without oscillation or external compensation. However, if an application will require a higher capacitive load drive when the AD8651 is in unity gain, then the use of external isolation networks can be used. The effect produced by this resistor is to isolate the op amp output from the capacitive load. The required amount of series resistance has been tabulated in Table 5 for different capacitive load. While this technique will improve the overall capacitive load drive for the amplifier, its biggest drawback is that it reduces the output swing of the overall circuit.
VCC U1 + V+ V- CL 0 RL
03301-B-056
Figure 56. Snubber Network
Settling Time
The settling time of an amplifier is defined as the time it takes for the output to respond to a step change of input and enter and remain within a defined error band, as measured relative to the 50% point of the input pulse. This parameter is especially important in measurements and control circuits where amplifiers are used to buffer A/D inputs or DAC outputs. The design of the AD8651 combines a high slew rate and a wide gain bandwidth product to produce an amplifier with very fast settling time. The AD8651 is configured in the noninverting gain of 1 with a 2 V p-p step applied to its input. The AD8651 has a settling time of about 130 ns to 0.01% (2 mV). The output is monitored with a 10x, 10 M, 11.2 pF scope probe.
THD Readings vs. Common-Mode Voltage
Total harmonic distortion of the AD8651 is well below 0.0004% with any load down to 600 . The distortion is a function of the circuit configuration, the voltage applied, and the layout, in addition to other factors. The AD8651 outperforms its competitor for distortion, especially at frequencies below 20 kHz, as shown in Figure 57.
0.1 VSY = +3.5V/-1.5V VOUT = 2.0V p-p
VIN
3
AD8651
2 -
RS
VOUT
0.05 0.02 0.01
0
0
THD + NOISE (%)
0.005 0.002 0.001
Figure 55. Driving Large Capacitive Loads
OPA350
Table 5. Optimum Values for Driving Large Capacitive Loads
CL 100 pF 500 pF 1.0 nF RS 50 35 25
0.0005 0.0002 0.0001 20 50 100 AD8651
03301-B-058
500 1k 2k FREQUENCY (Hz)
5k
20k
VIN 2V p-p
-1.5V
Figure 58. THD + N Test Circuit
Rev. B | Page 16 of 20
03301-B-059
2) Another way to stabilize an op amp driving a large capacitive load is to use a snubber network, as shown in Figure 56. Because there is not any isolation resistor in the signal path, this method has the significant advantage of not reducing the output swing. The exact values of RS and CS are derived experimentally. In Figure 56, an optimum RS and CS combination for a capacitive load drive ranging from 50 pF to 1 nF was chosen. For this, RS = 3 and CS = 10 nF were chosen.
Figure 57. Total Harmonic Distortion
3.5V - VOUT 600 47pF
AD8651
+
AD8651/AD8652
Driving a 16-Bit ADC
The AD8651 is an excellent choice for driving high speed, high precision ADCs. The driver amplifier for this type of application needs to have low THD + N as well as quick settling time. Figure 60 shows a complete single-supply data acquisition solution. The AD8651 drives the AD7685, a 250 kSPS, 16-bit data converter.1 The AD8651 is configured in an inverting gain of 1 with a 5 V single supply. Input of 45 kHz is applied, and the ADC samples at 250 kSPS. The results of this solution are listed in Table 6. The advantage of this circuit is that the amplifier and ADC can be powered with the same power supply. For the case of a noninverting gain of 1, the input common-mode voltage encompasses both supplies.
0 -20
AMPLITUDE (dB of Full Scale)
5V
10k 3 10k 1F 1k VIN 0V - 5V fIN = 45kHz 2 +
U1 V+ V- 2.7nF
03301-B-061
33 IN
VCC
AD8651
-
AD7685
1k
Figure 60. AD8651 Driving a 16-Bit ADC
Table 6. Data Acquisition Solution of Figure 60
Parameter THD + N SFDR 2nd Harmonics 3rd Harmonics Reading (dB) 105.2 106.6 107.7 113.6
fSAMPLE = 250kSPS fIN = 45kHz INPUT RANGE = 0 TO 5V
-40 -60 -80 -100 -120 -140 -160 0 10 20 30 40 50 60 70 80 FREQUENCY (kHz) 90 100 110 120
03301-B-060
1
For more information about the AD7685 data converter, go to http://www.analog.com/Analog_Root/productPage/productHome/0%2C21 21%2CAD7685%2C00.html
Figure 59. Frequency Response of AD8651 Driving a 16-Bit ADC
Rev. B | Page 17 of 20
OUTLINE DIMENSIONS
3.00 BSC
8 5
3.00 BSC
4
4.90 BSC
PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40
0.15 0.00 0.38 0.22 COPLANARITY 0.10
0.23 0.08 SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 61. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
5.00 (0.1968) 4.80 (0.1890)
8 5 4
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 62. 8-Lead Standard Small Outline Package [SOIC] (R-8) Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model AD8651ARM-REEL AD8651ARM-R2 AD8651AR AD8651AR-REEL AD8651AR-REEL7 AD8652ARMZ-R2* AD8652ARMZ-REEL* AD8652ARZ* AD8652ARZ-REEL* AD8652ARZ-REEL7* Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC Package Option RM-8 RM-8 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 Branding BEA BEA
A05 A05
*
Z = Pb-free part. Rev. B | Page 18 of 20
AD8651/AD8652 NOTES
Rev. B | Page 19 of 20
NOTES
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03301-0-9/04(B)
Rev. B | Page 20 of 20

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